1. Field of the Invention
The present invention relates to a fabrication method for electronic components such as diodes, transistors, integrated circuits, large scale integration, and in particular to a fabrication method for electronic components used in applications that require reduction in weight and size, such as mobile telephones, personal computers, notebook computers, computer game devices, wrist watches, electronic music boxes, navigation systems, small sized televisions, and camera modules.
2. Background Art
Conventionally, general use electronic components for an IC, etc., are formed by mounting a semiconductor element in which electronic circuits are formed on a lead frame, connecting by a wire bonds, etc., the electrodes of these electronic circuits and the connection terminals for external connection, and then curing a fused, hardened epoxy resin encapsulating material in a metal mold.
Recently, the popularization of devices that must be small sized and lightweight, such as a mobile phone, is increasing. Generally, in this type of device, first, after the specifications such as the size, weight, and design of the body are decided, the electronic circuits, antenna, etc., that are included in the specification are designed. The external dimensions and weight of electronic components employed in devices having this type of use are extremely restricted.
Thus, along with the reduction in weight and size of electronic components, technology has been proposed in which, when carrying out the encapsulation of the electronic component, the semiconductor elements and films in which the electronic elements are formed are used as an interposer, and after the semiconductor element is mounted and connected by the wire bonds or bumps on this interposer, it is sealed in the above-mentioned metal mold, and encapsulated with liquid epoxy resin encapsulating material. For electronic circuits formed by this technology, there is currently a shift to package types such as the BGA (Ball Grid Array) connector, in which solder balls are formed that electronically connect to the electronic circuits formed in the electronic components, and the CSP (Chip Size Package), which improves the size reduction of the electronic components, in order to the connect internal electronic circuits and the electronic circuits formed on the motherboard.
Furthermore, recently technology has been proposed that obtains a wafer-sized level package, which promotes the reduction in size of electronic components. In this technology, posts are formed on the wafer itself and a protective coating is formed by resin on the circuitry formed by planer technology on the wafer surface. Then, after forming the solder balls on the posts, a package having a wafer-sized level is obtained by separating each one by dicing. Moreover, the term xe2x80x9cpostxe2x80x9d as used in the present Specification denotes a part that electronically connects the electronic circuits formed in the electronic component and the external electronic circuits formed on the motherboard, for example.
According to this technology, the size of the package of the electronic component is the size of the semiconductor element itself, and thus the external dimensions of the electronic component are minimized. In addition, the electronic component is extremely thin because the encapsulating resin is limited to a thickness matching the height of the posts and the thickness of the semiconductor substrate, and the overall thickness when joined with the connection solder balls remains much smaller than the thickness of the conventional electronic component. Japanese Unexamined Patent Application, First Publication, No. Hei 10-79362, may be referred to for the details of this technology.
However, presently wearable computers are under development. This wearable computer is a computer used by attaching a miniaturized computer to a person in the same manner as an article of clothing. In order to realize this type of electronic device, in the future, small-sized and lightweight electronic devices are necessary.
To meet the need for this small size and light weight, one method that has been conceived is making the wafer itself thinner in order to design electronic components having a further reduced size.
Generally, present semiconductor elements use wafers made of silicon, for example. The thickness of these wafers is 400 microns (0.4 mm) or greater. Generally, the thickness of a six-inch wafer is 625 microns, and the thickness of an eight-inch wafer is 725 microns. Wafers having this degree of thickness are used because silicon, like glass, for example, is fragile when it is thin. That is, with planar technology, the electronic circuits are formed on the semiconductor substrate by the various processes such as doping a part of the substrate with an n-type or p-type dopant, applying and developing a resist for forming the pattern of the electronic circuits, and applying wiring. However, if an extremely thin wafer is used, it may be broken during these processes. Thus, handling a wafer thinner than 0.4 mm is practically impossible. Furthermore, after forming the electronic circuits on the wafer surface using planar technology, attempts have been made to produce a wafer thinner than 400 microns by grinding the back surface of the wafer and then forming bumps and applying an encapsulating material, but handling the thin wafer is difficult in these processes.
However, generally it is said that essentially as long as the depth the electronic circuits is about 20 microns (0.02 mm) below the wafer surface, the wafer will function as an electronic circuit without any problems. Thus, being able to make the thickness of the wafer in which the electronic components are formed less than 0.4 mm would be extremely advantageous when reducing the size of electronic components further.
In consideration of the above-described problems, it is an object of the present invention to provide a fabrication method for electronic components that allows further reduction in the size of electronic components by making the semiconductor substrate thin, and at the same time, functions as an electronic circuit without problems, and further, has both sufficient durability and a high reliability even when used in a portable electronic device.
In order to attain this these objects, the fabrication method for electronic components of the present invention is characterized in providing a first application process in which an encapsulating resin is applied to a surface on which posts are formed, a back surface grinding process in which the back surface of this substrate is ground, a second application process in which an encapsulating resin is applied to the back surface of the substrate after grinding, and a separation process in which the substrate is cut along with the encapsulating resin and the individual electronic components are separated.
According to the present invention, because there is a process in which the wafer is ground, thinner electronic components can be manufactured. Furthermore, because the wafer is ground when the electronic components are embedded within the substrate and encapsulated, the substrate is not broken, and thin electronic circuits can be manufactured.
In addition, because the encapsulating resin is applied not only to the surface on which posts are formed, but the back surface of the substrate as well, the separation process can be carried out without producing a warping of the substrate, and production defects decrease dramatically.
Furthermore, because the encapsulating resin is applied not only to the surface on which the posts are formed, but the back surface of the substrate as well, both the surface in which electronic circuits are formed as well as the back surface are protected, and highly reliable electronic components that can sufficiently endure external pressure during surface mounting can be manufactured.
In addition, the method of manufacturing electronic components of the present invention is characterized in providing a groove formation process in which grooves are formed in the surface on which posts are formed, a first application process in which an encapsulating resin is applied to the surface in which the grooves are formed, a back surface grinding process in which the back surface of the substrate is ground until the grooves are exposed, a second application process in which encapsulating resin is applied to the back surface of the substrate after grinding, and a separation process in which the encapsulating resin that sufficiently fills the grooves is cut and the individual electronic components are separated.
According to the present invention, because electronic components can be fabricated having the entire substrate in which electronic components are formed encapsulated by the encapsulating resin, and because there are no influences such as moisture absorption from the surrounding atmosphere, the reliability of the electronic components can be made extremely high.
Preferably the above-described invention further has a curing process in which the encapsulating resin applied by the first application process is cured, and in addition, preferably the above-described invention further has a surface grinding process in which the surface to which the encapsulating resin has been applied during the back surface grinding process is ground. Furthermore, preferably the invention further has a curing process in which the encapsulating resin applied by the second application process is cured, and preferably the invention further has a connection ball formation process in which the connection balls are formed on the posts before the separation process.
Here, the connection ball formation process is characterized in comprising a process of screen printing a soldering paste on the posts, and a process of fusing and quenching the screen printed soldering paste.
In addition, the first application process and the second application processes preferably apply the encapsulating resin by screen printing. Furthermore, preferably the thickness of the printing screen used in the second application process should be set according to the curing contraction percentage of the encapsulating resin used in the first application process.
In addition, fabrication method of electronic components of the present invention is characterized in having a first application process in which an encapsulating resin is applied to the surface of the substrate on which the posts are formed, a back surface grinding process in which the back surface of the substrate is ground until the substrate becomes a specified thickness, a groove formation process in which groves from the back surface of the substrate that has been ground to the encapsulating resin applied in the first application process are formed, a second application process in which an encapsulating resin is applied to the back surface of the substrate in which the grooves are formed, and a separation process in which the encapsulating resin that fills the groove part is cut and individual electronic components are separated.
According to this invention, because grooves are formed from the back surface of the substrate after the encapsulating resin is applied to one surface of the substrate, the strength of the entire substrate on which the encapsulating resin has been applied is increased, and there is no concern that the substrate will fracture in subsequent processes.
Here, preferably there are a curing process in which the encapsulating resin that was applied by the second application process is pressure cured and a front surface grinding process in which the surface on which the encapsulating resin has been applied is ground before the back surface grinding process. In addition, there is a further connection ball formation process in which connection balls are formed for the posts before the separation process.